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Table of contents
1 Introduction
1.1 Hardware Accelerators
1.2 Challenges of Code Generation for Hardware Accelerators
1.3 Our Solution: Partially Specified Implementations
1.4 Key Contributions
1.5 Organization
2 Motivation: Partially Specified Schedules
2.1 Problem Statement: Scheduling a Basic Block
2.2 Background: Constraint Satisfaction Problems
2.3 Partially Specified Schedule
2.4 Optimistic Model of Partially Specified Schedules
2.5 Summary
3 Representing Candidate Implementations
3.1 Candidate Implementations
3.2 Decision Space Definition
3.3 Candidate Representation Description Language
3.4 Example: Instructions Scheduling Within a Basic Block
3.5 Constraint Propagation Code Generation
3.6 Discussion
3.7 Summary
4 Application: Linear Algebra on GPUs
4.1 Background: GPUs Architecture
4.2 Kernel Representation
4.3 Decisions Encoding
4.4 Code Generation
4.5 Discussion
4.6 Summary
5 An Optimistic Performance Model of Candidates
5.1 Model Overview
5.2 Single Thread Model
5.3 Instantiation of the Model for Kepler GPUs
5.4 Empirical Evaluation
5.5 Discussion
5.6 Summary
6 Scaling the Search with the Properties of Candidates
6.1 Search Algorithm
6.2 Sample Kernels
6.3 Empirical Evaluation
6.4 Discussion
6.5 Summary
7 Conclusion
7.1 Principal Contributions
7.2 Long Term Perspectives



