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Table of contents
TABLE OF CONTENTS
LIST OF FIGURES
LIST OF TABLES
GENERAL INTRODUCTION
CHAPTER 1. STATE-OF-THE-ART
1.1 Introduction
1.2 Power Converters
1.2.1 Active Components
1.2.1.1 GaN power devices
1.2.1.2 SiC power devices
1.2.2 Switching cell
1.2.2.1 Parasitic elements and their issues
1.2.3 Multicell power converter
1.3 Power Packaging
1.3.1 2D Packaging
1.3.1.1 Structure
1.3.1.2 Limiting points
1.3.2 3D Packaging
1.3.2.1 Metal post interconnection technology
1.3.2.2 Solder bump interconnection technology
1.3.2.3 Dimple array interconnection technology
1.3.2.4 Direct solder interconnection technology
1.3.2.5 Embedded power technology
1.3.2.6 Press Pack technology
1.3.2.7 Spring contact technology
1.3.2.8 PCB technology
1.3.3 Conclusion
1.4 Fabrication Process
1.4.1 Solder
1.4.2 Sintering
1.4.3 PCB technology
1.5 Conclusion
CHAPTER 2. LOW VOLTAGE PACKAGING WITH GAN FETS
2.1 Introduction
2.2 Proposed structures
2.2.1 Presentation of the GaN components
2.2.2 Thermal and electrical issues of package
2.3 Fabrication process
2.3.1 DBC preparation
2.3.1.1 Substrate cleaning
2.3.1.2 Photolithography
2.3.2 Reflow Soldering
2.3.3 Prototype I: Flip-chip with DBC
2.3.4 Prototype II: “Flip flip” chip on DBC
2.3.5 Prototype III: Flip-chip on PCB
2.3.6 Conclusion
2.4 Thermal analysis
2.4.1 Thermal conduction
2.4.2 Thermal convection
2.4.3 Thermal Radiation
2.4.4 FEM analysis
2.4.5 Thermal simulation of GaN prototypes
2.4.6 Experimental characterizations
2.4.7 Conclusion
2.5 Electromagnetic and electric study
2.5.1 Half-bridge demonstrator
2.5.2 Electromagnetic analysis
2.5.2.1 Wire bonding prototype
2.5.2.2 GaN Prototypes
2.5.2.3 Analytical approach for partial inductance
2.5.3 Electric analysis
2.5.3.1 Electrical Simulation
2.5.3.2 Experimental characteristics
2.6 Conclusion
CHAPTER 3. HIGH VOLTAGE PACKAGING WITH VERTICAL COMPONENTS
3.1 Introduction
3.2 Proposed structures for the analysis of the contact
3.3 Fabrication process
3.3.1 PCB materials used in fabrication
3.3.1.1 Isola PCL370HR and Arlon 55NT
3.3.1.2 Release film and press-pads
3.3.2 Chemical Ag deposition
3.3.3 Chip preparation
3.3.4 Ag Sintering
3.3.5 Detailed description of the process
3.3.5.1 PCB embedding
3.3.5.2 Etching
3.3.6 Laser ablation
3.3.7 Metallization
3.4 Static characterization of the embedded diode
3.5 Analysis of electric contact
3.5.1 Modelling
3.5.2 Experimental measurement
3.5.3 Conclusion
3.6 Half bridge prototype
3.6.1 Layout adaption for component surface
3.6.1.1 IGBT
3.6.1.2 Diode
3.6.2 Process flow
3.6.3 Manufacturing data generation
3.6.4 Design Tolerance
3.6.5 FEM simulation
3.6.6 Experimental characterization
3.6.7 Improvement
3.7 Conclusion
CONCLUSION AND PERSPECTIVES
BIBLIOGRAPHY
