Diamond as a Semiconducting Material
As mentioned in the introduction, diamond has properties that could deliver excellent properties for a number of electronic devices. This section gives an overview of the properties for diamond and other materials relevant to the the-ory behind the C–V measurements and the FEM simulations in Comsol Multi-physics. The properties are summarized in Table 2.1.
Due to diamond’s wide bandgap, the intrinsic carrier concentration at room temperature is very low and consequently pure diamond is an excellent insulator. Unfortunately, diamond lacks of known, relatively shallow dopants. In diamond, known dopants are only partially thermally activated at room temperature . The most usually mentioned donor, phosphorus, has an activation energy of about 0.57 eV. Boron, the acceptor used in the investigated diamond samples, has an activation energy of 0.36 eV (see Figure 2.1) .
For diamond and the other materials used in the devices, parameters such as the dielectric constants, the electron aﬃnity, and the work functions are all essential for the theory behind the C–V measurements, as will be discussed further in Section 3.1.1.
In general, a MOS capacitor is made of a semiconductor body or substrate, an insulator film, e.g. SiO2, and a metal electrode called a gate. The MOS capacitor is not a widely used device in itself. However, it is the basic building block of the MOSFET .
Compared to silicon-based MOSFETs, diamond based MOSFETs could op-erate at higher frequencies, higher power densities, and have higher breakdown voltages. To achieve MOSFET operation in diamond, eﬀective surface oxide passivation layers are being developed at the Division for Electricity. Eﬀective surface passivation is required for reproducibility, to reduce the surface leakage and to reduce the concentration of surface trapping centers. 
A p-type MOSFET operates when minority charge is being generated at positive gate voltages. The generation of such charge can be examined by mea-surements on a MOS capacitor. In this thesis, C–V measurements are performed both at room temperature and at elevated temperatures, to examine the behav-ior of minority carriers in diamond MOS capacitors.
The MOS capacitors used were made out of an aluminum gate, an oxide layer of Al2 O3 and an ohmic contact of Ti/Al. Both bulk configurations (see Figure 2.2) and planar configurations (see Figure 2.3) were fabricated. Since a back contact was added at the bottom of the planar devices, measurements through the bulk could also be performed on this configuration.
Two diﬀerent devices from sample #231 were fabricated. The first device (bulk configuration) had an oxide thickness of 30 nm, and a contact diameter of 250 µm. In the second device (planar/bulk configuration), the oxide thickness was 30 nm and the contact diameter was 200 µm. From sample #224, only the planar configuration was fabricated.
Schottky Barrier Diodes
A Schottky barrier diode is based on the formation of a potential barrier that can arise at the interface surface between a metal and a semiconductor. During reverse recovery it can switch very rapidly from forward conduction to reverse blocking. This makes the Schottky diode a suitable device for use as a rectifying diode in very high frequency and fast switching power electronic applications. The on-state voltage drop can be very low, for example 0.3 to 0.5 V in silicon, which is significantly lower than for silicon p-n diodes.
Typical metals used are molybdenum, platinum, chromium or tungsten. For n-type Schottky diodes, forward conduction results from the electrons passing over the potential barrier from the n-type silicon into the metal, reverse conduction is impeded by the formation of a space charge layer. 
In a p-type Schottky diode, as is considered in this thesis, the holes are passing over to the metal from the semiconductor when a high enough negative voltage is applied. The diode consists of a Schottky contact, a diamond sample, and an ohmic back contact which could be made of titanium and aluminum.
At the Division for Electricity, one of the projects is to develop rectifiers for electric converter systems, based on thin layers of synthetic diamond. Com-pared to present power semiconductor technology, diamond devices have the huge potential advantage of substantially smaller losses for electric energy con-version. They could significantly increase the eﬃciency of electricity generation and distribution, especially from renewable sources, thereby reducing pollution and greenhouse gas emissions.
Even though the theoretically estimated breakdown fields could be as high as 20 MV/cm , the highest experimentally achievable breakdown fields are below 3 MV/cm . One of the reasons for the early breakdown is that several kinds of defects are present in the material . Another reason is that diamond lacks proper edge termination techniques . This can cause early breakdown to occur at the edge of the contact. Figure 2.4 shows breakdown induced damage by cross polar imagery. In this master thesis, one of the aims is at fabricating Schottky diodes that can withstand higher applied voltages, by investigating alternative designs leading to a more uniform field distribution.
Fabrication of the Devices
The devices in this thesis were fabricated at Ångström MSL cleanroom. The methods used are described below.
• Cleaning of the sample: Cleaning was done with acetone, isopropanol, and hydrofluoric acid (HF). Diﬀerent chemicals were used for etching oﬀ diﬀerent materials. Isopropanol was used as the last step since it leaves a clean surface without residues.
• Surface termination: The surfaces of the samples were oxygen-terminated, meaning a monolayer of oxygen atoms are terminated on the surface. This is to have a controlled fabrication and avoid any external materials in direct contact to the diamond. By oxygen termination, the electron aﬃnity becomes 1.7 eV , which ultimately will aﬀect the results of the C–V measurements.
• Photolithography: In this step, the contacts are designed. The sample was coated with a photosensitive material (photoresist). By spinning the sample at 6000 rpm for 30 seconds, a photoresist layer of 1050 nm results . A mask with a pattern corresponding to the placement of the contacts was placed over the sample. The structure was exposed to UV light, leaving a pattern of exposed photoresist on the sample. Exposed pho-toresist was removed by a developer, so that only unexposed photoresist remains. After that, a layer of metal was deposited to form the contacts where the photoresist is removed. Finally, even the photoresist that is not exposed was removed by a lift-oﬀ process. 
• Inductively coupled plasma (ICP): For fabrication of a Schottky diode with semi-isotropic etched surfaces, the sample was bombarded by a mixture of chloride and oxygen plasma. A mask made out of aluminum was placed on top of the sample, forming a Faraday’s cage. This mask forms the pattern of the etching. The width of the etched out part is dependent on the distance between the sample and the aluminum mask, where a larger distance gives a wider shape.
• Atomic layer deposition (ALD): The ALD process uses two diﬀerent chem-icals, called precursors, to build up a thin film on top of the substrate. By alternately exposing the substrate to the diﬀerent precursors, layer by layer of atoms are deposited . In the thesis work, ALD was used to deposit Al2O3 for the MOS devices.
• Sputtering: Metal can be deposited to the substrate by sputtering. Dur-ing sputtering, the material to be deposited is bombarded with positive argon ions. The material is sputtered away mainly as neutral atoms by momentum transfer and ejected surface atoms are deposited onto the sub-strate . This method was used to deposit ohmic contacts on the MOS capacitors.
• Electron beam (e-beam) evaporation: This is a type of physical vapor deposition (PVD) that is based on the boiling oﬀ of a heated material onto a substrate in a vacuum. A high intensity electron beam gun (3 to 20 keV) is focused on the material, which evaporates and deposits on the substrate . E-beam evaporation was used to deposit contacts above the oxide. The method was used because it is a more gentle method than sputtering, which was necessary due to the sensitive and thin oxide layer.
To inspect the structures, atomic force microscopy (AFM), scanning electron microscopy (SEM), and profilers were used. The back contact of the device was attached to a conducting holder using silver paste.
C–V measurements are one of the most powerful techniques used in the elec-trical characterization of semiconductors. The C–V curve is usually measured with a C–V meter, which applies a DC bias gate voltage (Vg) and a small si-nusoidal voltage signal (vac) to the MOS capacitor and measures the capacitive AC current (icap) with an AC ammeter. For MOS capacitors, the capacitance is calculated from C = icap=!vac , where ! is the angular frequency of the applied voltage.
The AC voltage typically varies at frequencies of 10 kHz to 1 MHz with an amplitude of 10 to 20 mV, but other frequencies and other voltages can be used . Many characteristics of the samples and the devices can be evaluated by C–V measurements, such as
1. Flatband voltage, Vfb, is the gate voltage that causes the surface potential s to be zero (see Figure 3.1). It can be determined from a high frequency
(hf) C–V plot by diﬀerenting 1=(Chf ) twice, and finding the maximum of that curve which occurs at Vfb . The flatband is an imprtant parameter for characterization of oxide charge.
2. Threshold voltage, which is the voltage where inversion charge starts to generate at the depletion region (see Figure 3.2).
Oxide charges, which can be analyzed e.g. from shifts in Vfb.
Ideal C–V Curves
During a bias sweep, diﬀerent states can be attributed to the C–V characteris-tics, as seen in Figure 3.2. At voltages below the flatband voltage, the device is said to be in accumulation. In this state, majority charges from the substrate accumulate at the depletion region (close to the semiconductor–oxide interface). Since there is much charge that can respond to the AC-voltage, the result is a capacitance close to that of the oxide capacitance.
As the voltage increases, less charge is gathered at the depletion region. This state is called depletion. Since there is not as much charge that can respond to the AC-voltage, the AC-current and also the capacitance decreases.
For lower frequencies, when the voltage is increased below the threshold voltage, minority carriers start to be generated, resulting again in a capacitance close to the oxide capacitance. For higher frequencies, the C–V curve deviates from the low frequency C–V curve for voltages higher than the threshold voltage, since the inversion charge is unable to follow the AC voltage. This gives the high-frequency C–V curve seen in Figure 3.2. When the DC bias voltage is changed rapidly with insuﬃcient time for inversion charge generation, deep depletion follows .
The theoretical low frequency capacitance of a MOS capacitor is decided both by the oxide capacitance Cox and by the capacitance caused by charge accumulating at the depletion layer Cd;lf . The oxide capacitance (per area unit) is calculated from Cox = « ox=tox , where « ox is the dielectric constant of the oxide and tox is the thickness of the oxide. The depletion layer capacitance is more complicated to calculate and depends on the surface potential s (see Figure 3.1) of the semiconductor. To investigate this, it can be assumed that s is known.
Table of contents :
2 Diamond Based Electronic Devices
2.1 Types of Diamond
2.2 Diamond as a Semiconducting Material
2.3 MOS Capacitors
2.4 Schottky Barrier Diodes
2.5 Fabrication of the Devices
3 MOS Capacitors
3.1 Capacitance–Voltage Measurements
3.1.1 Ideal C–V Curves
3.1.2 Elevated Temperatures
3.1.3 Non-ideal C–V Curves
3.1.4 Measurement Setup
3.2 I–V Measurements
4 High Voltage Schottky Diodes
4.2 Differential Equations
5 Results and Discussion
5.1 Electrical characterization of the MOS Capacitors
5.1.1 Inversion Phenomenon
5.1.2 Oxide Charges
5.1.3 Oxide Thickness
5.1.4 I–V Measurements
5.2 Simulation of Schottky Diodes
6 Conclusions 39A Implementation in Comsol
A.1 Poisson’s Equation and the Current density equation
A.2 Applied voltages
A.3 Boundary conditions