Polyvinylidene ,uoride based materials and their characterization,in metal-insulator-metal capacitor structure 

Get Complete Project Material File(s) Now! »

Materials and structure selected for OTFT fabrication

In order to adequately evaluate and compare the properties of a chosen dielectric, the intrinsic performance of the semiconductor layer should remain as constant as possible and the overall properties of the transistor be highly reproducible. Considering that requirement, we mades several choice regarding materials and structures for the transistor fabrication.
The transistor’s processing was carried out on exible substrate with lithographed gold contacts to minimize the disparity potentially introduced by printed electrodes. Gold was selected for its stability and work function (5:1-5:47 eV depending on measurement method) which can be nely tuned by the addition of a SAM (not a dielectric in this particular case). In bottom gate transistors, the semiconductor is deposited directly onto the dielectric, thus conforming to the speci city of it surface. To avoid the potential variability introduced into the OSC, we preferred a top-gate transistor structure (Figure 1.4 a)) which would allow for a consistent deposition surface.
In order to avoid mobility inconsistencies arising from highly crystalline dependent small molecules, a semi-crystalline polymer semiconductor have been preferred in order to ensure stable and reproducible performance. We chose a commercially available package of material as the main body of our transistor structure. The lisicon®package, purchased from Merck (Germany), o ers a selection of contact SAMs, polymeric semiconductors and low- dielectrics with various formulations or dilutions for the desired requirements. We used the following materials in our transistor structure:
M001 Self assembled monolayer solution used for tuning gold contacts work function and facilitate the access from the metal electrode into the semiconductor thus allowing acceptable contact resistance (Rc).
D320 Non uorinated low- dielectric ( D320 2:2), optimized compatibility with SP400 semiconductor.
Each of these material is pre-packaged in solution with adequate dilution for the desired processing technique (Spin-coating, screen printing, gravure printing ect…). The fact that the full composition of these materials is not disclosed by the manufac-turer would arguably hinder the physical comprehension of some transistor’s aspect. Nevertheless, theses phenomena are not in the core of our study and choosing these material allow for highly reproductive process and performance which will help to evaluate the impact of the high- dielectric in similar conditions when added into the transistor’s stack.
The SAM deposition was carried out in a solution bath and spin-coating was used for the semiconductor and dielectrics. The full fabrication of the transistor is further discussed in Chapter 3
In this transistor con guration, the gate electrode was the last layer to be deposited. It could be either printed or vapour deposited from various inks or materials. However, some parasitic e ects like di usion in the dielectric, mechanical abrasion, uneven coverage or oxidation might be introduced by the use of inadequate inks or metals. To limit these issues we chose to use thermally evaporated gold as the gate electrode. The evaporation was carried out though a shadow mask in a vacuum evaporator using Joule’s heating principle as potential degradation to the dielectric can be introduced by the electron beam method (further explained in the next chapter).
The nal resulting structure should provide reproducible data for the accurate characterisation of high- materials in a bilayer transistor.

High- polymer and methodology

As stated previously and by silicon standard, for a material to be a high- , its dielectric constant should be higher than 3:9. However, because of their general structure organic polymers generally display low permittivity and only a small portion achieve high enough performance to fall in the high- category. We can see in Figure 1.17 that the general strategy for high permittivity polymers is to have either large amount of dipolar moment or atoms with large electronic cloud like uorine.
Polyvinylidene di uoride (PVDF) and its derivative are a family of dielectric poly-mer with one of highest highest permittivity recorded in organic polymer (> 10: D320) alongside with some other interesting dielectric properties like ferroelectricity, thermo-electricity and piezoelectricity. We chose to make them the main focus of our study and to evaluate their impact when introduced in a transistor structure. Multiple examples of low-voltage transistors implementing this type of material in a bilayer structure have already been reported with relative success in the literature[47, 55, 56].

THIS THESIS

However, instabilities are often reported in the nal transistor and few in depth study of the dielectric materials are provided. We selected the terpolymers (polymer with three di erent monomer units) derived from PVDF as their properties can be nely tuned with composition and a such could be tailored to the transistor’s needs.
The main goal of our study was to understand and link the dielectric properties of the high- polymers to the nal transistor structure. To do so, we rst studied the terpolymer material by itself in a simple Metal-Insulator-Metal (MIM) capacitor to probe its dielectric behaviour. We investigated the impact of various intrinsic and extrinsic parameters on the material’s properties to have a deeper understanding of the terpolymer’s dielectric behaviour. The high- material was then studied in a bilayer dielectric structure to evaluate the impact of a low- layer in series with the terpolymer. The geometry of the bilayer was modi ed to gain insight on the relation between its two constitutive dielectrics.
Once a good understanding of the dielectric was achieved, we begun the integration of the high- into the transistor structure. In order to be able to understand the changes introduced by the bilayer dielectric we rst established a reference devices based solely on the low- dielectric to act as a baseline for comparison purpose. After which we proposed and studied a rst proof of concept for a low-voltage transistor based on a relaxor-ferroelectric bilayer. The introduced variation in operating voltage and hysteresis was studied with the help of variation of geometry identical to the one conducted one the capacitor structure. As a consequence we produced an optimized transistor structure capable of operating at low voltage while maintaining most of the baseline properties encountered in the reference structure.
Finally, we investigated the stability of the bilayer transistor regarding electrical stress as these device are generally used as part of larger circuits with constant electrical solicitations. Thus granting insight on the reliability of the fabricated low-voltage transistor. In a similar fashion to the rest of this work, the response of the bilayer was compared to a reference transistor, thus allowing to keep track of the modi cations introduced by the high- polymer.
Conclusion 1.3 (This thesis) To meet printing and solution processing re-quirements we chose to evaluate the implementation of a high- dielectric in the gate stack to produce low-voltage OTFTs. From the few high permittivity organic polymers available, we chose to study terpolymers based on the polyvinylidene di uoride (PVDF) as they are the most promising in terms of dielectric constant and tunability. However, these materials display various dielectric properties that may impact the transistor behaviour. We thus proposed to rst study the terpolymer in a stand-alone structure (MIM capacitor) to evaluate and under-stand its properties. Then integrate it into the transistor stack and compare the resulting low-voltage TFT to a reference device. Finally we will study the reliability of the produced low-voltage transistor regarding electrical stress.
Introduction of a high- dielectric as gate insulator will drastically impact the OFETs characteristics. It is thus important to evaluate and understand the intrinsic properties of such materials before drawing questionable conclusions on observation of the rather elaborate transistor structure. This chapter thus aims to study high-polymers derived from PVDF in simple MIM parallel plate capacitors.
The rst section of this chapter will begin with a brief introduction of the dielectric theory and the measurement of dielectric properties, to then be followed by a structural introduction of the Polyvinylidene uoride based materials and origin of their speci c behaviours. In a second section we will discuss relative the impact of chemical composition, bias, frequency and temperature on the characterisation the dielectric properties of the terpolymer. Finally the last section of this chapter will be devoted to the study of a possible linear window of operation in the terpolymer along with the impact of a low- layer addition to the high- .

READ  Knowledge Management Systems

Polarization

Polarization, electrical displacement and permittivity

By de nition, dielectrics/insulators are materials exhibiting poor electrical conduct-ivity. Unlike metals, when placed in an electric eld the current cannot ow through these materials as they do not possess free electrons capable of drifting across the bulk of volume. The bound charged elements present in any materials (atoms and electronic clouds) will however be displaced by the applied electric eld[57]. Positive charged elements will be displaced in the direction of the eld, and negative charged elements will be displaced in the opposite direction of the eld. As a result electrically neutral molecules could present a local electric dipolar moment (Figure 2.1). At a larger scale this translate to a net bound charge (Qb) at the surface of the material.

Table of contents :

1 Context of the topic 
1 Organic thin lm transistors
1 Basic materials in electronic
2 Organic semiconductors
3 Organic transistor theory – basic principle
4 Organic transistor theory – regimes of operation
5 Basic Theory – extractions of the key parameters
2 Low voltage for organic thin lm transistors
1 Physical dependence of operating voltage
2 Interface
3 Ultra-thin dielectrics
4 High permittivity dielectrics
3 This Thesis
1 State of the art in low-voltage OTFTs
2 Materials and structure selected for OTFT fabrication
3 High-polymer and methodology
2 Polyvinylidene ,uoride based materials and their characterization,in metal-insulator-metal capacitor structure 
1 Polarization
1 Polarization, electrical displacement and permittivity
2 Fabrication of capacitors and electrical measurements

GET THE COMPLETE PROJECT

Related Posts