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Table of contents
I Theoretical introduction
Bolometric Detectors
1.1 Terahertz Imaging
1.2 Principal Detectors for the THz Area
1.2.1 Bolometric Detectors
1.2.2 Hot Electron Bolometric Effect
1.2.3 Variety of Bolometric Sensors
1.3 Heterodyne Detection
1.4 Noise in Bolometric Detectors
The Transistor MOS
2.1 CMOS Device Overview
2.2 Physics of the MOS Transistor
2.2.1 Semiconductors
2.2.2 Physical Overview of the MOS Transistor
2.3 Electrical Characteristics of the MOS Transistor
2.3.1 Static I-V Characteristic
2.3.2 Small Signal Parameters
2.4 Parasitic Elements in the MOS Device
2.4.1 Capacities in the MOS transistor
2.4.2 Small Scale Transistor Devices
2.4.3 Figure of Merit of the MOS Transistor
2.5 Basic process parameters
2.6 Trends in CMOS development
2.6.1 Very Low Dimension Transistors
2.6.2 Single Electron Transistor
Noise in Electronic Circuits
3.1 Noise in Electronic Circuits
3.1.1 The Random Nature of Noise
3.2 Noise Sources in Electronic Systems
3.2.1 Thermal Noise
3.2.2 The 1/fα Low Frequency Noise
3.2.3 Shot Noise
3.2.4 Non-Electrical Noise Sources
3.3 Noise Analysis, Basic Noise Characteristics
3.3.1 Signal to Noise Ratio SNR
3.3.2 Noise Figure NF
3.3.3 Noise Temperature
3.3.4 Equivalent Input Noise Voltage
3.3.5 Correlation
3.4 Noise in the MOS Transistors
3.5 Low Noise Design
3.5.1 Feedback in Electrical Circuits
3.5.2 Chopper Amplifier
3.5.3 Superconducting Quantum Interference Device
II Architecture of readout electronics
Architecture of Readout Electronics.
4.1 Electrical Specification of Sensors
4.2 Basic Concepts of Readout Electronics
4.2.1 Current and Voltage Bias
4.2.2 Differential Technique of Readout
4.2.3 Special Readout Techniques
4.3 Choice of Readout Configuration
4.4 Differential Voltage Amplifiers
4.4.1 Dynamic Model of Operational Amplifier
4.5 Applications of Operational Amplifiers
4.5.1 Inverting Amplifier
4.5.2 Differential Amplifiers
4.5.3 Cryogenic Aspects
4.6 Specification of Amplifiers to be Designed
4.6.1 Choice of CMOS/Bipolar Process
4.6.2 Choice of Amplifier Topology
4.6.3 Specifications of Electrical Performances
4.7 Conclusion
III Design of CMOS amplifiers
Design of CMOS Fixed-Gain Differential Amplifiers
5.1 Constant Gain Amplifiers, Design Approaches
5.1.1 Structures of Feedback-Free Voltage Amplifiers
5.2 Temperature Modelling of the MOS Transistor
5.2.1 Thermal Behaviour of the MOS Transistor
5.2.2 Extraction of the Parameters
5.2.3 LS Model Parameters Fitting
5.2.4 Verification of the Model
5.3 Structures of CMOS Fixed Gain Amplifiers
5.3.1 Common Source Amplifier
5.3.2 Increasing of the Voltage Gain
5.3.3 Adopted Solution: Low gm Active Load
5.3.4 Low gm Composite Transistor
5.3.5 Analysis of the Low gm Composite Transistor
5.3.7 Common Source Amplifier with Low gm Load
5.4 Differential Pair and Cascode Effect
5.4.1 Cascode and Folded Cascode
5.4.2 MOS Input Differential Pair
5.5 Amplifier with Low gm Composite Transistor
5.5.4 Summary of 1st Amplifier Basic Parameters
5.6 Linear Temperature Compensated Amplifier
5.6.1 Low Transconductance Linear Composite Load
5.6.2 Differential Folded Cascode with Linear Load
5.6.3 Basic Characteristics of the Linear Amplifier
5.6.4 Analysis of the Temperature Behaviour
5.6.5 Design of the Type II Amplifier
5.6.6 Performances of the 2nd (Linear) Amplifier: Summary
5.7 Output Voltage Buffer
5.7.1 Common Drain Voltage Follower
5.7.2 Linear Low Offset Voltage Buffer
Appendix: Simulated operating points
AC and Noise Analysis
6.1 AC Analysis of the Amplifier
6.1.1 AC Response of Folded Cascode Transconductor
6.1.2 Analysis of the Low gm Composite Transistor
6.1.3 CMRRatio and the Gain Symmetry
6.2 Noise of the Amplifier
6.2.1 Noise of the MOS Input Differential Pair
6.2.2 Noise of the Low Composite Transistor
6.3.3 Noise Characteristic of the Amplifiers
Integration in CMOS AMS 0.35 μm: Results
7.1 Layout of the Differential Amplifiers
7.1.1 Matching of the MOS Transistors
7.1.2 Symmetric Layout, Common Centroid Structure
7.1.3 Layout of the Amplifiers
7.2 Testing the Amplifiers
7.2.1 Test Facility
7.3 Type I Geometry-Fixed Gain Amplifier
7.3.1 DC characteristics
7.3.2 AC Performances of the 1st Amplifier
7.3.3 Wide Temperature Range Measurements
7.4 Type II Temperature-Compensated Linear Amplifier
7.4.2 AC Performances of 2nd Amplifier
7.4.3 Cryogenic measurements of Type II amplifier
7.5 Summary of Achieved Results
7.5.1 Comparison with the State-of-the-Art
Conclusion of part III
IV High performance active frequency filters
Design of active frequency filters
8.1 Frequency Filters in the Amplification Chain
8.2 Scope of the Work
8.3 Design Approaches to Active Frequency Filters
8.3.1 Approximation of Transfer Function
8.3.1 Design of Passive RLC Ladder Filters
8.3.2 Active Simulation of Passive RLC Filters
8.3.3 Cascade Synthesis of Frequency Filters
8.4 Imperfections of Frequency Filters
8.5 Digitally Controlled Analog Filtering Systems
8.5.1 Structure of the Universal Analog Frequency Filter
8.5.2 Electrical Design of Filter Blocks
8.5.3 Control Software of Frequency Filter
8.5.4 Realisation of the Instrument and Conclusion
Biqadratic Sections with Increased Attenuation.
9.1 Biquadratic Sections for Cascade Filter Design
9.1.1 The Biquadratic Transfer Function
9.2 Active Biquadratic Sections
9.2.1 Single Amplifier Biquads (SAB)
9.2.2 Multiple Active Element Biquad: Antonius GIC
9.3 Degradation in the Stopband of LP Filters
9.3.1 Causes of the Parasitic Effect
9.3.2 attenuation of the Sallen-Key LP Section
9.3.3 The lossy RCD 2nd Order Section
9.3.4 Causes of LP Stopband Degradation
9.4 Type II Sallen-Key filter
9.5 Current Mode CCII cascade Section
Design of CMOSSecond Generation Current Conveyor CCII
10.1 Current Conveyor
10.1.1 Second Generation Current Conveyor
10.1.2 Basic Structure of the Current Conveyor
10.1.3 Real Properties of CCII
10.2 CMOS Realisation of the CCII-
10.2.1 Low Impedance Voltage Buffer
10.2.2 CCII- CMOS Current Conveyor
10.3 CMOS Integration of CCII-
10.3.1 AC & DC Characteristic of integrated Circuit
10.3.2 1.5MHz 5th order LP filter
10.4 Conclusion
Conclusion of Part III
Appendix
Summary in French
Présentation
I Electronique de lecture
I.1 Capteur bolométrique
I.2 Configuration de l’électronique de lecture
I.3 « Architecture sans contre-réaction »
II Conception des amplificateurs CMOS
II.1 Comportement thermique d’un transistor MOS
II.2 Méthode de Conception
II.3 Amplificateur de Type I
II.3 Amplificateur de type II
L’analyse thermique
II.4 Conclusion A
III Filtres de fréquences actifs
III.1 L’atténuation des filtres passe-bas
III.2 Sallen-Key de type II
III.4 Convoyeur de courant CCII
III.3 Conclusion B
References
