Synchronous Statecharts Compilation

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Table of contents

List of Figures
List of Tables
1 Introduction
1.1 Context
1.2 Motivation
1.3 Objectives and Contributions
1.4 Thesis Organization
I State of the Art
2 Hierarchical Data Representations for Parallel Applications
2.1 The Data-Parallel Paradigm
2.1.1 The Functional Style
2.1.2 HTA: Hierarchically Tiled Arrays
2.2 Hierarchical Tasks
2.2.1 The Sequoia Approach
2.2.2 HiDP: Hierarchical Data Parallel Language
2.3 Low-level Trends
2.4 Model-Driven Representations
2.5 Conclusion
3 Semantics of Hierarchical State Machines
3.1 Harel’s Statecharts
3.2 Semantics of Statecharts
3.2.1 The STATEMATE Semantics
3.2.2 Formal Semantics of Statecharts
3.3 The Unified Modeling Language
3.3.1 A Structured Network of Statecharts
3.3.2 Informal Semantics
3.3.3 Formal Semantics
3.4 Synchrounous Statecharts
3.5 Conclusions
4 Code Optimization and Generation of High-Level Models
4.1 Compilation of UML Statecharts
4.1.1 Model-to-Model Optimizations
4.1.2 Optimizing Beyond the Back-end Language
4.2 Domain Specific Languages Supporting Model Based Design
4.3 Synchronous Statecharts Compilation
4.4 Conclusions
II Proposition
5 hHOEi2 Language
5.1 Objects
5.1.1 Interface
5.1.2 Imports
5.2 Hierarchical State Machines
5.3 Modeling Arithmetics
5.4 Parallel Actions
5.5 Initiators
5.6 Object Creation
5.7 Indexed Regions
5.8 Scalars
5.9 Modeling Applications
5.10 Contributions
6 hHOEi2 Formal Semantics
6.1 Introduction
6.2 Domains
6.3 Semantics of Actions
6.3.1 Sequential and Parallel Composition
6.3.2 Update
6.3.3 Send
6.3.4 Indexed Actions
6.4 Semantics of Transitions
6.5 State Machine Evaluation
6.6 Indexed Configurations
6.7 Scalars
6.7.1 Applyon Semantics
6.8 Contributions
7 Intermediate Representation
7.1 Overview
7.2 Structure
7.3 Creator
7.4 Hierarchical State Machine
7.4.1 Parallel Statements
7.4.2 Send
7.4.3 Update
7.4.4 Branching
7.4.5 Regions
7.5 Translating hHOEi2
7.5.1 Compilation of States and its Transitions
7.5.1.1 Actions
7.5.1.2 Transition
7.5.2 Propagation of Index Domains
7.5.3 Defining Initiators
7.5.4 “all” Condition
7.5.5 Indexed Regions
7.6 Contributions
8 The Compiler: Analysis, Optimization and Code Generation
8.1 Challenges
8.1.1 Instantaneous Reaction
8.1.2 Mutability
8.2 The Optimizing Compiler
8.3 Analyses
8.3.1 DefUse Chain: Structured Analysis of Reachable Definitions
8.3.2 Message Dependency Analyzer
8.3.3 Transaction Selector
8.3.4 Scalar Constants
8.4 Transformations
8.4.1 Index Sets
8.4.2 Dead Code Elimination
8.4.3 Dead Associations Elimination
8.4.4 Rewriting Broadcasts
8.4.5 Basic Block Fusion
8.4.6 Loop Fusion
8.4.7 Inlining
8.4.8 Folding of Operational Transitions
8.4.9 Dead Wait Rewriter
8.4.10 Unboxing Types
8.5 Contributions
III Validation
9 Experimental Results
9.1 Code Generation Strategy
9.1.1 Runtime
9.1.2 Code Generation
9.2 Exercising the Optimizing Flow
9.3 Metrics and Results
9.4 Application Development: The hHOEi2 Approach
9.5 Towards GPGPU Code Generation
9.5.1 Extending the Optimizing Chain
9.5.2 OpenCL Code Generation
9.6 Conclusions
10 Conclusions and Perspectives
10.1 Main Results and Contributions
10.2 A Look Back to the Thesis Motivations
10.3 Future Research Directions
Glossary
A Syntax
A.1 hHOEi2
A.2 Intermediate Representation
Bibliography