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**Chapter 3 EMI Simulation of the PFC Converter**

This chapter presents the DM, CM and total noise simulation results for a 1KW CCM PFC converter operating at 100KHz switching frequency. Based on the modeling and characterization techniques described in Chapter 2, the simulated EMI noise closely matches the measurement result in all of the DM, CM and total noise aspects. Before the results are shown, two important issues for obtaining such good match are discussed, and the PFC converter hardware will be briefly described.

**Simulation Time Step Selection**

Using the modeling and characterization techniques in the medium and high frequency ranges, a detailed simulation circuit can be obtained. A simplified version of it is shown in Fig. 3.1.

With the simulation circuit, it is still necessary to select appropriate simulation time step, which is an important parameter for circuit simulations, especially for the EMI simulation.

Different simulation time steps can yield different simulation results. As can be seen from Fig. 3.2, the simulated DM noise spectrum using the 2ns time step (top spectrum) is different from that using the 20ns time step (bottom spectrum). The difference occurs mainly in the high frequency range. The magnitudes at low frequencies are almost identical.

Generally, using a smaller simulation time step can yield more accurate simulation waveforms. However, simulations using small time steps also require longer simulation times and require more memory space. So the question is that what is a reasonable simulation time step that can satisfy the demand for EMI simulation while using the shortest simulation time and smallest amount of memory space. The answer should be related to the high-end frequency of conducted EMI regulations, which is 30MHz. For the 30MHz sinusoidal signal, the period is approximately 33.3ns. When the simulation time step is 2ns, there will be at least 16 points for each period, which should be an adequate number to represent a sinusoidal signal for one period. Therefore, the simulation result around 2ns should be a reasonable choice and the following comparison will further confirm this conclusion. Note that this conclusion is based on the simulation data in one line cycle. If the FFT is based on data from more line cycles, the appropriate simulation time step can be larger than 2ns. However, to obtain simulation data in more line cycles, the simulation time is definitely increased.

Based on the comparison results shown in Fig. 3.3, the difference between the simulated DM noise using time steps of 0.2ns and 2ns is very small up to 30MHz, which means that using simulation time step smaller than 2ns will not offer much improvement for conducted EMI simulation. (Note the envelopes of the noise peaks of the two spectrums are almost overlapped).

**Noise Separator Selection**

Although the EMI standards regulate the total EMI noise, the noises can be divided into DM noise and CM noise in order to effectively minimize each type of noise for an overall emission suppression. The noise separator is an essential component to serve this purpose.

Several types of noise separators have been discussed in previous literature. Nave has several patents to build noise separators and his company provided these rejection networks several years ago [C 1]. Current probes can also be used to measure both modes of noise current. However, it requires a sophisticated current probe. Furthermore, for the government regulation, the noise voltage is the concern, and it is not straightforward to convert the measured noise current to noise voltage [C 7].

Ting Guo proposed a noise separator using power combiner/splitter [C 7]. The basic working principle can be expressed as follows, and an example is shown in Fig. 3.4. The noise separator for measuring the DM noise is essentially a CM rejection network. A 180° power combiner can fulfill this requirement, because this combiner can cancel two voltages with the same phase while combining two voltages out of phase. Since the voltage across one LISN resistor is *CM* + *DM* , and the other is *CM* − *DM* , the *CM *noise will be canceled out, and the *DM* noise remains. Note that the output voltage will be 2 *DM* instead of 2*DM* , since the output power needs to be equal to the input power. For a more detail derivation, see the reference [C 7].

The function of the noise separator is to reject CM noise while passing the DM noise, or to reject DM noise while passing the CM noise. Two kinds of power splitters have been selected to serve as the noise separators in [C 7] with the Mini-circuit Company part number ZFSCJ-2-1 and ZFSC-2-6-75. During the EMI measurement of this work, two better noise separators are found with the Mini-circuit Company part number ZSCJ-2-2 and ZSC-2-2. Checking the noise separators’ performance with the two basic requirements for noise separators can reveal the difference between the previous noise separators and the new ones.

Since the interfaces of the ports 1 and 2 are coaxial BNC type connectors, the instruments for measuring the input impedance of them also need to have coaxial interface. One instrument for this measurement is the network analyzer. Network analyzers can measure the electrical parameters such as transfer function gain, transfer function phase, reflection coefficient *r* , and S-parameters.

The measurement setup for measuring the reflection coefficient *r* is shown in Fig. 3.5. The spectrum analyzer HP4195A launches a frequency-sweeping signal to the noise separator. The incident wave and the reflected wave are detected by the HP41952A transmission/reflection test set. When measuring the reflection coefficient of port 1 or port 2, port S needs to be connected to a 50Ω standard load. The termination of the other port is not important; one can refer to the explanation for the isolation of the noise separator in [C 7] for the reason.

According to Fig. 3.8, the rejection ratio at 100KHz is only 22dB, which is not good enough for the purpose of rejection. The reason is that the working frequency range of this particular power splitter, ZFSCJ-2-1, is from 1MHz to 500MHz [C 7], while the conducted EMI regulation frequency range is from 150KHz to 30MHz. After searching the catalog of the same company, Mini-circuit, a new power splitter is found and it can better serve as a DM noise measurement tool. The part number is ZSCJ-2-2, and one picture of it is shown in Fig. 3.9.

As can be seen from Fig. 3.10, the impedance magnitude and phase are close to the ideal values for the whole conducted EMI range, 150KHz to 30MHz.

Because the input impedance is closer to the ideal values, the CM rejection ratio is also improved. Using the same setup as used for the results in Fig. 3.8, the measurement results for the 100KHz sinusoidal signal are given as an example in Fig. 3.11.

**Chapter 1 Introduction**

1.1. Background

1.2. Literature Review

1.3. Objective of this Study

1.4. Thesis Organization

**Chapter 2 Modeling and Characterization Techniques in the Medium and High Frequency Ranges**

2.1. Overview of the Modeling and Characterization Techniques

2.2. Component Level Modeling and Characterization

2.3. Device Model Verification

2.4. Module Level Modeling and Characterization

2.5. System Level Modeling and Characterization

**Chapter 3 EMI Simulation of the PFC Converter**

3.1. Simulation Time Step Selection

3.2. Noise Separator Selection

3.3. Hardware Description

3.4. EMI Noise Prediction for the PFC Converter

**Chapter 4 DM/CM Loop Models and the Effects of Circuit Components on EMI**

4.1. DM Loop and CM Loop Models

4.2. The Effect of the PFC Inductor on DM Noise

4.3. The Effect of the Parasitic Capacitance CCM on the CM Noise

4.4. The Effect of the VDS Rising and Falling Times on DM and CM Noise

4.5. The Effect of the Input Wires and Crec

Conclusions and Future Work

Reference

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Modeling and Characterization of a PFC Converter in the Medium and High Frequency Ranges for Predicting the Conducted EMI